Korkean tarkkuuden TDC-järjestelmän toteuttaminen FPGA:lla
This thesis examines the design, implementation, and investigation of a Time-to-Digital Converter (TDC) system suitable for detecting fast signals. As a basis for the implementation, the STEMlab 125-14 computation and signal processing card manufactured by Red Pitaya was selected, on which the actua...
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| Muut tekijät: | , , , , , |
| Aineistotyyppi: | Pro gradu |
| Kieli: | fin |
| Julkaistu: |
2024
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| Aiheet: | |
| Linkit: | https://jyx.jyu.fi/handle/123456789/95662 |