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  1. 1
    Yield measurements at IGISOL with a digital data acquisition system

    Yield measurements at IGISOL with a digital data acquisition system by Khanam, Afrina, kirjoittaja

    Published 2017
    JYX-julkaisuarkisto / JYX Digital Archive
    Master's thesis
  2. 2
    Korkean tarkkuuden TDC-järjestelmän toteuttaminen FPGA:lla

    Korkean tarkkuuden TDC-järjestelmän toteuttaminen FPGA:lla by Kuusisto, Eetu

    Published 2024
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    Master's thesis
  3. 3
    Precise delay generation using differential-input delay cells used in delay-locked-loop

    Precise delay generation using differential-input delay cells used in delay-locked-loop by Nahid, Hasan, MD

    Published 2023
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    Master's thesis
  4. 4
    Yield measurements at IGISOL with a digital data acquisition system

    Yield measurements at IGISOL with a digital data acquisition system by Khanam, Afrina

    Published 2017
    Get full text Get full text
    Master's thesis
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