Precise delay generation using differential-input delay cells used in delay-locked-loop - Nahid, Hasan, MD (2023)
With the advancement of technology, integrated circuits became smaller and faster with ever-decreasing technology nodes. The voltage headroom to work with analog circuits became smaller with the downscaling and it paved the path to process the analog signals in time domain. Time-to-digital converter is that kind of device that can take advantage of processing the signal in time domain with picosecond resolution. A delay-locked-loop (DLL) based TDC uses a delay line which acts as the timing generator. Like a phase-locked-loop (PLL), a DLL is also constituted by a phase detector, charge pump, and voltage-controlled delay line. The number of delay cells in the delay line depends on the total amount of time that needs to be measured. Although an additional counter could act as coarse converter to increase the dynamic range. Every individual cell produces the same amount of delay that defines the resolution of the TDC.